Please use this identifier to cite or link to this item: http://hdl.handle.net/20.500.11889/8320
Title: SecSoC: A Secure System on Chip Architecture for IoT Devices
Authors: Hroub, Ayman 
Elrabaa, Muhammad E. S. 
Keywords: Internet of things - Security measures;Computer security;Secure processor;Electronic data processing;Secure architecture;Hardware security;Hardware encryption;Data encryption (Computer science);Hardware decryption
Issue Date: 2022
Publisher: Proceedings of the 2022 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2022
Abstract: IoT technology is finding new applications every day and everywhere in our daily lives. With that, come new use cases with new challenges in terms of device and data security. One of such challenges arises from the fact that many IoT devices/nodes are no longer being deployed on owners’ premises, but rather on public or private property other than the owner’s. With potential physical access to the IoT node, adversaries can launch many attacks that circumvent conventional protection methods. In this paper, we propose Secure SoC (SecSoC), a secure system-on-chip architecture that mitigates such attacks. This include logical memory dump attacks, bus snooping attacks, and compromised operating systems. SecSoC relies on two main mechanisms, (1) providing security extensions to the compute engine that runs the user application without changing its instruction set, (2) adding a security management unit (SMU) that provide HW security primitives for encryption, hashing, random number generators, and secrets store (keys, certificates, etc.). SecSoC ensures that no secret or sensitive data can leave the SoC IC in plaintext. SecSoC is being implemented in Bluespec SystemVerilog. The experimental results will reveal the area, power, and cycle time overhead of these security extensions. Overall performance (total execution time) will also be evaluated using IoT benchmarks.
URI: http://hdl.handle.net/20.500.11889/8320
DOI: 10.1109/HOST54066.2022.9839995
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